XCS20 and XCS20XL

Note: The Spartan series devices described in this data sheet include the 5V Spartan family and the 3.3V Spartan-XL family. See the separate data sheet for the 2.5V Spartan-II family.
• First ASIC replacement FPGA for high-volume production with on-chip RAM
• Density up to 1862 logic cells or 40,000 system gates
• Streamlined feature set based on XC4000 architecture
• System performance beyond 80 MHz
• Broad set of AllianceCORE™ and LogiCORE™ predefined solutions available
• Unlimited reprogrammability
• Low cost
• 3.3V supply for low power with 5V tolerant I/Os
• Power down input
• Higher performance
• Faster carry logic
• More flexible high-speed clock network
• Latch capability in Configurable Logic Blocks
• Input fast capture latch
• Optional mux or 2-input function generator on outputs
• 12 mA or 24 mA output drive
• 5V and 3.3V PCI compliant
• Enhanced Boundary Scan
• Express Mode configuration
• Chip scale packaging

Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
2. Maximum DC overshoot (above V_CC) or undershoot (below GND) must be limited to either 0.5V or 10 mA, whichever is easier to achieve.
3. Maximum AC (during transitions) conditions are as follows; the device pins may undershoot to 2.0V or overshoot to +7.0V, provided this overshoot or undershoot lasts no more than 11 ns with a forcing current no greater than 100 mA.
4. For soldering guidelines, see the Package Infomation on the Xilinx website.

The Spartan™ and the Spartan-XL families are a high-vol- ume production FPGA solution that delivers all the key requirements for ASIC replacement up to 40,000 gates. These requirements include high performance, on-chip RAM, core solutions and prices that, in high volume, approach and in many cases are equivalent to mask pro- grammed ASIC devices.

The Spartan series is the result of more than 14 years of FPGA design experience and feedback from thousands of customers. By streamlining the Spartan series feature set, leveraging advanced process technologies and focusing on total cost management, the Spartan series delivers the key features required by ASIC and other high-volume logic users while avoiding the initial cost, long development cycles and inherent risk of conventional ASICs. The Spar-tan and Spartan-XL families in the Spartan series have ten members, as shown in Table 1.