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XCR3032XL

Features: • Lowest power 32 macrocell CPLD• 5.0 ns pin-to-pin logic delays• System frequencies up to 200 MHz• 32 macrocells with 750 usable gates• Available in small footprint packages - 48-ball CS BGA (36 user I/O pins) - 44-pin VQFP (36 user I/O) - 44-pin PLCC (36 u...

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SeekIC No. : 004548117 Detail

XCR3032XL: Features: • Lowest power 32 macrocell CPLD• 5.0 ns pin-to-pin logic delays• System frequencies up to 200 MHz• 32 macrocells with 750 usable gates• Available in small fo...

XCR3032XL Data Sheet

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Part Number:
XCR3032XL
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Lowest power 32 macrocell CPLD
• 5.0 ns pin-to-pin logic delays
• System frequencies up to 200 MHz
• 32 macrocells with 750 usable gates
• Available in small footprint packages
   - 48-ball CS BGA (36 user I/O pins)
   - 44-pin VQFP (36 user I/O)
   - 44-pin PLCC (36 user I/O)
• Optimized for 3.3V systems
   - Ultra-low power operation
   - 5V tolerant I/O pins with 3.3V core supply
   - Advanced 0.35 micron five layer metal EEPROM process
   - Fast Zero Power™ (FZP) CMOS design technology
• Advanced system features
   - In-system programming
   - Input registers
   - Predictable timing model
   - Up to 23 available clocks per function block
   - Excellent pin retention during design changes
   - Full IEEE Standard 1149.1 boundary-scan (JTAG)
   - Four global clocks
   - Eight product term control terms per function block
• Fast ISP programming times
• Port Enable pin for dual function of JTAG ISP pins
• 2.7V to 3.6V supply voltage at industrial temperature range
• Programmable slew rate control per macrocell
• Security bit prevents unauthorized access
• Refer to XPLA3 family data sheet (DS012) for architecture description


Description

The XCR3032XL is a 3.3V, 32-macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of two function blocks of XCR3032XL provide 750 usable gates. Pin-to-pin propagation delays are 5.0 ns with a maximum system frequency of 200 MHz.


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