Features: • 5 ns pin-to-pin logic delays• System frequency up to 178 MHz• 144 macrocells with 3,200 usable gates• Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-CSP (117 user I/O pins)• Optimized for hi...
XC95144XL: Features: • 5 ns pin-to-pin logic delays• System frequency up to 178 MHz• 144 macrocells with 3,200 usable gates• Available in small footprint packages - 100-pin TQFP (81 use...
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Symbol |
Description |
Value |
Units |
VCC |
Supply voltage relative to GND |
0.5 to 4.0 |
V |
VIN |
Input voltage relative to GND(1) |
0.5 to 5.5 |
V |
VTS |
Voltage applied to 3-state output(1) |
0.5 to 5.5 |
V |
TSTG |
Storage temperature (ambient) |
65 to +150 |
|
TSOL |
Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm) |
+220 |
|
TJ |
Junction temperature |
+150 |
|
The XC95144XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. XC95144XL is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns. See Figure 2 for architecture overview.