Features: • 7.5 ns pin-to-pin logic delays on all pins• fCNT to 125 MHz• 108 macrocells with 2400 usable gates• Up to 108 user I/O pins• 5 V in-system programmable (ISP) - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temper...
XC95108: Features: • 7.5 ns pin-to-pin logic delays on all pins• fCNT to 125 MHz• 108 macrocells with 2400 usable gates• Up to 108 user I/O pins• 5 V in-system programmable (ISP...
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Symbol | Parameter | Value | Units |
VCC | Supply voltage relative to GND | -0.5 to 7.0 | V |
VIN | DC input voltage relative to GND | -0.5 to VCC + 0.5 | V |
VTS | Voltage applied to 3-state output with respect to GND | -0.5 to VCC + 0.5 | V |
TSTG | Storage temperature | -65 to +150 | |
TSOL | Max soldering temperature (10s @ 1/16 in = 1.5 mm) | +260 |
The XC95108 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of six 36V18 Function Blocks, providing 2,400 usable gates with propagation delays of 7.5 ns. See Figure 2 for the architecture overview.