XC5VLX155-2FF1760C

The XC5VLX155-2FF1760C is one member of the Virtex-5 family that can provides the newest most powerful features in the FPGA market. This family of device contains five distinct platforms (sub-families), the most choice offered by any FPGA family. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. And this device has 32 global-clock MUX buffers. The clock tree is designed to be differential. Differential clocking helps reduce jitter and duty cycle distortion.

Features of the XC5VLX155-2FF1760C are:(1)Support of autonomous instructions: no pipeline stalls;(2)128-bit wide pipelined APU Load/Store;(3)Programmable decode for custom instructions;(4)Auto-synchronization for non-integer PLB-to-CPU clock ratios;(5)Dedicated interface for connection to DDR2 memory controller;(6)Integrated scatter/gather DMA controllers;(7)128-bit Processor Local Buses (PLBs);(8)Out-of-order execution;(9)Multiple instructions per cycle;(10)Greater than 1000 DMIPS per core;(11)Up to 550 MHz operation. If you want to know more information about the XC5VLX155-2FF1760C, please download the datasheet in www.seekic.com or www.chinaicmart.com .