XC4VSX35-10FF668C

The XC4VSX35-10FF668C is a member of Virtex-5 FPGA family with 34,560 logic cells, 15,360 slices, 240 Kb distributed RAM (Max), 192 Xtreme DSP slices, 192 18 Kb blocks and 3,456 Kb block RAM (Max). It contains many hard-IP system level blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25 x 18 DSP slices, SelectIO™ technology with built-in digitallycontrolled impedance, ChipSync™ source-synchronous interface blocks, system monitor functionality, enhanced clock management tiles with integrated DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. Built on a 65-nm state-of-the-art copper process technology, it is a programmable alternative to custom ASIC technology.

There are some features XC4VSX35-10FF668C as follows. (1) five platforms LX, LXT, SXT, TXT, and FXT; (2) cross-platform compatibility: LXT, SXT, and FXT devices are footprint compatible in the same package using adjustable voltage regulators; (3) powerful clock management tile (CMT) clocking; (5) 36-Kbit block RAM/FIFOs; (6) high-performance parallel SelectIO technology; (7) advanced DSP48E slices; (8) flexible configuration options; (9) system monitoring capability on all devices; (10) integrated Endpoint blocks for PCI express designs; (11) tri-mode 10/100/1000 Mb/s Ethernet MACs; (12) RocketIO GTP transceivers 100 Mb/s to 3.75 Gb/s: LXT and SXT platforms; (13) RocketIO GTX transceivers 150 Mb/s to 6.5 Gb/s: TXT and FXT platforms; (14) 65-nm copper CMOS process technology; (15) 1.0 V core voltage; (16) high signal-integrity flip-chip packaging available in standard or Pb-free package options.

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