XC2S300E-FGG456C

The XC2S300E-FGG456C is one member of the XC2S300E series device which designed as one kind of high performance,abundant logic resources,and a rich feature set,all at an exceptionally low price.The family offers densities ranging from 50,000 to 300,000 system gates,system performance is supported beyond 200 MHz.

Features of the XC2S300E-FGG456C are four mainly points:(1)second generation ASIC replacement technology:--densities as high as 6,912 logic cells with up to 300,000 system gates;--streamlined features based on Virtex-E architecture;--unlimited in-system reprogrammability;--very low cost;(2)system level features:--fully 3.3V PCI compliant to 64 bits at 66 MHz and cardBus compliant;--low-power segmented routing architecture;--full readback ability for verification/observability;--dedicated carry logic for high-speed arithmetic;--efficient multiplier support;--cascade chain for wide-input functions;--abundant registers/latches with enable,set,reset;--four dedicated DLLs for advanced clock control;--four primary low-skew global clock distribution nets;(3)versatile I/O and packaging:--low cost packages available in all densities;--family footprint compatibility in common packages;--19 high-performance interface standards, including LVDS and LVPECL;--20;--up to 120 differential I/O pairs that can be input,output,or bidirectional;--zero hold time simplifies system timing;(4)fully supported by powerful Xilinx ISE development system:--fully automatic mapping,placement,and routing;--integrated with design entry and verification tools.

If you want to know more information such as the spartan-IIE family compared to spartan-II family about the XC2S300E-FGG456C,please download the datasheet in www.seekic.com .