XC2S150-5FG256C

IC FPGA 2.5V 864 CLB'S 256-FBGA

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SeekIC No. : 003504169 Detail

XC2S150-5FG256C: IC FPGA 2.5V 864 CLB'S 256-FBGA

floor Price/Ceiling Price

US $ 16.2~16.2 / Piece | Get Latest Price
Part Number:
XC2S150-5FG256C
Mfg:
Supply Ability:
5000

Price Break

  • Qty
  • 0~90
  • Unit Price
  • $16.2
  • Processing time
  • 15 Days
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Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Quick Details

Series: Spartan®-II Manufacturer: Xilinx Inc
Number of LABs/CLBs: 864 Number of Logic Elements/Cells: 3888
Total RAM Bits: 49152 Number of I /O: 176
Number of Gates: 150000 Voltage - Supply: 2.375 V ~ 2.625 V
Maximum Power Dissipation : 2990 mW Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 85°C Package / Case: 256-BGA    

Description

Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 85°C
Package / Case: 256-BGA
Voltage - Supply: 2.375 V ~ 2.625 V
Supplier Device Package: 256-FBGA (17x17)
Total RAM Bits: 49152
Manufacturer: Xilinx Inc
Series: Spartan®-II
Number of I /O: 176
Number of LABs/CLBs: 864
Number of Logic Elements/Cells: 3888
Number of Gates: 150000


Description

The XC2S150-5FG256C belongs to the Spartan-II 2.5 V FPGA family. There is some information about the Spartan-II FPGA family as follows.

The Spartan-II family of FPGA XC2S150-5FG256C (Field-Programmable Gate Array) have a regular, flexible, programmable architecture of Configurable Logic Blocks (CLBs), surrounded by a perimeter of programmable Input/Output Blocks (IOBs). There are four Delay-Locked Loops (DLLs), one at each corner of the die. Two columns of block RAM lie on opposite sides of the die, between the CLBs and the IOB columns. These functional elements are interconnected by a powerful hierarchy of versatile routing channels. They are ideal for shortening product development cycles while offering a cost-effective solution for high volume production.

There are some features of XC2S150-5FG256C. (1) it adopts second generation ASIC replacement technology with unlimited reprogrammability, very low cost and densities as high as 5,292 logic cells with up to 200,000 system gates; (2) system level features: fully PCI compliant, low-power segmented routing architecture, full readback ability for verification/observability, cascade chain for wide-input functions, four dedicated DLLs for advanced clock control and four primary low-skew global clock distribution nets; (3) versatile I/O and packaging: low cost packages available in all densities, family footprint compatibility in common packages, 16 high-performance interface standards, hot swap compact PCI friendly and zero hold time simplifies system timing.

What comes next is about the absolute maximum ratings of XC2S150-5FG256C. (1): VCCINT (supply voltage relative to GND) is from -0.5 to 3.0 V; (2): VCCO (supply voltage relative to GND) is from -0.5 to 4.0 V; (3): VREF (input reference voltage) is from -0.5 to 3.6 V; (4): VIN (input voltage relative to GND) is from -0.5 to 5.5 V when 5 V tolerant I/O and from -0.5 to VCCO+0.5 V when no 5 V tolerance; (5): VTS (voltage applied to 3-state output) is from -0.5 to 5.5 V when 5 V tolerant I/O and from -0.5 to VCCO+0.5 V when no 5 V tolerance; (6): TSTG (storage temperature (ambient)) is from -65 to +150; (7): TJ (junction temperature) is +125.




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