XC18V02VQG44C

The XC18V02VQG44C is designed as one kind of in-system programmable configuration PROM device that generates a configuration clock that drives the PROM. A short access time after CE and OE are enabled, data is available on the PROM DATA (D0) pin that is connected to the FPGA DIN pin.

Features of the XC18V02VQG44C are:(1)IEEE Std 1149.1 Boundary-Scan (JTAG) Support; (2)JTAG Command Initiation of Standard FPGA Configuration; (3)Simple Interface to the FPGA; (4)Cascadable for Storing Longer or Multiple Bitstreams; (5)5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals; (6)3.3V or 2.5V Output Capability; (7)Design Support Using the Xilinx ISE Foundation Software Packages; (8)Available in PC20, SO20, PC44, and VQ44 Packages; (9)Lead-Free (Pb-Free) Packaging; (10)Low-Power Advanced CMOS FLASH Process.

The absolute maximum ratings of the XC18V02VQG44C can be summarized as:(1)Supply voltage relative to GND: -0.5 to +4.0 V;(2)Input voltage with respect to GND: -0.5 to +5.5 V;(3)Voltage applied to high-Z output: -0.5 to +5.5 V;(4)Storage temperature (ambient): -65 to +150 °C;(5)Junction temperature: +125 °C. If you want to know more information such as the electrical characteristics about the XC18V02VQG44C, please download the datasheet in www.seekic.com or www.chinaicmart.com.