XA-G37

Features: • 20-bit address range, 1 megabyte each program and data space. (Note that the XA architecture supports up to 24 bit addresses.)• 2.7 V to 5.5 V operation• 32K bytes on-chip EPROM program memory• 512 bytes of on-chip data RAM• Three counter/timers with enhan...

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SeekIC No. : 004547590 Detail

XA-G37: Features: • 20-bit address range, 1 megabyte each program and data space. (Note that the XA architecture supports up to 24 bit addresses.)• 2.7 V to 5.5 V operation• 32K bytes on-c...

floor Price/Ceiling Price

Part Number:
XA-G37
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 20-bit address range, 1 megabyte each program and data space. (Note that the XA architecture supports up to 24 bit addresses.)
• 2.7 V to 5.5 V operation
• 32K bytes on-chip EPROM program memory
• 512 bytes of on-chip data RAM
• Three counter/timers with enhanced features (equivalent to 80C51 T0, T1, and T2)
• Watchdog timer
• Two enhanced UARTs
• Four 8-bit I/O ports with 4 programmable output configurations
• 44-pin PLCC and 44-pin LQFP packages



Specifications

PARAMETER RATING UNIT
Operating temperature under bias 55 to +125
Storage temperature range 65 to +150
Voltage on EA/VPP pin to VSS 0 to +13.0 V
Voltage on any other pin to VSS 0.5 to VDD+0.5 V V
Maximum IOL per I/O pin 15 mA
Power dissipation (based on package heat transfer limitations, not device power consumption) 1.5 W



Description

The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for high-volume, low-cost applications.

The XA family provides an upward compatibility path for 80C51 users who need higher performance and 64k or more of program memory. Existing 80C51 code can also easily be translated to run on XA microcontrollers.

The performance of the XA architecture supports the comprehensive bit-oriented operations of the 80C51 while incorporating support for multi-tasking operating systems and high-level languages such as C. The speed of the XA architecture, at 10 to 100 times that of the 80C51, gives designers an easy path to truly high performance embedded control.

The XA architecture supports:
• Upward compatibility with the 80C51 architecture
• 16-bit fully static CPU with a 24-bit program and data address range
• Eight 16-bit CPU registers each capable of performing all arithmetic and logic operations as well as acting as memory pointers. Operations may also be performed directly to memory.
• Both 8-bit and 16-bit CPU registers, each capable of performing all arithmetic and logic operations.
• An enhanced instruction set that includes bit intensive logic operations and fast signed or unsigned 16 × 16 multiply and 32 / 16 divide
• Instruction set tailored for high level language support
• Multi-tasking and real-time executives that include up to 32 vectored interrupts, 16 software traps, segmented data memory, and banked registers to support context switching
• Low power operation, which is intrinsic to the XA architecture, includes power-down and idle modes.

More detailed information on the core is available in the XA User Guide.




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