X98024

Voltage on V_A, V_D, or V_X
(referenced to GND_A=GND_D=GND_X) . . . . . . . . . . . 4.0V
Voltage on any analog input pin
(referenced to GNDA) . . . . . . . . . . . . . . . . .-0.3V to V_A
Voltage on any digital input pin
(referenced to GND_D) . . . . . . . . . . . . . .-0.3V to +6.0V
Current into any output pin . . . . . . . . . . . . . . ±20mA
Operating Temperature range . . . . . .0°C to +70°C
Junction Temperature . . . . . . . . . . . . . . . . . .+125°C
Storage Temperature . . . . . . . . . . -65°C to +150°C
CAUTION: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The X98024 3-channel, 8-bit Analog Front End (AFE) contains all the components necessary to digitize analog RGB or YUV graphics signals from personal computers, workstations and video set-top boxes. The fully differential analog design provides high PSRR and dynamic performance to meet the stringent requirements of the graphics display industry. The AFE's 240MSPS conversion rate supports resolutions up to WUXGA at 75Hz refresh rate, while the front end's high input bandwidth ensures sharp images at the highest resolutions.

To minimize noise, the X98024's analog section features 2 sets of pseudo-differential RGB inputs with programmable input bandwidth, as well as internal DC restore clamping (including mid-scale clamping for YUV signals). This is followed by the programmable gain/offset stage and the three 240MSPS Analog-to-Digital Converters (ADCs). Automatic Black Level Compensation (ABLC™) eliminates part-to-part offset variation, ensuring perfect black level performance in every application.

The X98024's digital PLL generates a pixel clock from the analog source's HSYNC or SOG (Sync-On-Green) signals. Pixel clock output frequencies range from 10MHz to 240MHz with sampling clock jitter of 250ps peak to peak.