X86C64

• CONCURRENT READ WRITE™
   -Dual Plane Architecture Isolates Read/Write Functions Between Planes Allows Continuous Execution of Code From One Plane While Writing in the Other Plane
• Multiplexed Address/Data Bus
   -Direct Interface to Popular 8-bit Microcontrollers, e.g. Zilog Z8 Family
• High Performance CMOS
   -Fast Access Time, 120 ns
   -Low Power 60 mA Maximum Active 200 A Maximum Standby
• Software Data Protection
• Block Protect Register
   -Individually Set Write Lock Out in 1K Blocks
• Toggle Bit
   -Early End of Write Detection
• Page Mode Write
   -Allows up to 32 Bytes to be Written in One Write Cycle
• High Reliability
   -Endurance: 10,000 Write Cycle
   -Data Retention: 100 Years

The X86C64 is an 8K x 8 E2PROM fabricated with advanced CMOS Textured Poly Floating Gate Technology.The X86C64 features a Multiplexed Address and Data bus allowing direct interface to a variety of popular single-chip microcontrollers operating in expanded multiplexed mode without the need for additional interface circuitry.

The X86C64 is internally configured as two independent 4K x 8 memory arrays. This feature provides the ability to perform nonvolatile memory updates in one array and continue operation out of code stored in the other array; effectively eliminating the need for an auxiliary memory device for code storage.

To write to the X86C64, a three byte command sequence must precede the byte(s) being written. The X86C64 also provides a second generation software data protection scheme called Block Protect. Block Protect can provide write lockout of the entire device or selected 1K blocks. There are eight, 1K x 8 blocks that can be write protected individually in any combination required by the user. Block Protect, in addition to Write Control input, allows the different segments of the memory to have varying degrees of alterability in normal system operation.