Features: • Integrates Three Major Functions
- Power Sequencing
- Hot Swap Controller
- System Management Functions
• Penta-Power Sequencing
- Sequence up to 5 DC/DC converters.
- Four independent voltage enable pins
- Four time delay circuits
- Soft Power Sequencing - MRC pin restarts sequence without power cycling.
• Hot Swap Controller
- Programmable overvoltage and undervoltage protection
- Undervoltage lockout for battery/redundant supplies
- Electronic circuit breaker - Overcurrent Detection and Gate Shut-off
- Overcurrent limit during Insertion
- Hardshort retry with retry failure flag
- Selectable gate current using IGQ pins (10, 70, 150A)
- MRH pin controls board insertion/extraction.
- Typically operates from -30V to -80V. Tolerates transients to -200V (limited by external components)
• System Management
- Reset output, with delay, holds off host until all supplies are good
- Host control of reinsertion with MRH input
- Host control of resequencing using MRC input
• Available packages
- 32-lead Quad No-Lead Frame (QFN)Application• -48V Hot Swap Power Backplane/Distribution Central Office, Ethernet for VOIP
• Card Insertion Detection
• Power Sequencing DC/DC/Power Bricks
• IP Phone Applications
• Databus Power Interfacing
• Custom Industrial Power Backplanes
• Distributed Power SystemsPinout
SpecificationsTemperature under bias . . . . . . . . . . . . . . . . . . 65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Voltage on given pin (Hot Side Functions):
Vov/uv pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .5.5V + VEE
SENSE pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mV + VEE
VEE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -80V
DRAIN pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48V + VEE
PWRGD pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V + VEE
GATE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD + VEE
FAR pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V + VEE
MRH pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
BATT_ON pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
Voltage on given pin (Cold Side Functions):
ENi pins (i = 1 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
ViGOOD pins (i = 1 to 4) . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
MRC pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
IGQ1 and IGQ0 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V + VEE
VDD pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V + VEE
D.C. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . 300°CDescriptionThe X80010, X80011, X80012, X80013 contain three major functions: a power sequencing controller, a hotswap controller, and systems management support.
The power sequencer controller time sequences up to five DC/DC modules. The X80010, X80011, X80012, X80013 allows various DC/DC power sequencing configurations, either parallel or relay modes.The power good, enable, and voltage good signals provide
for flexible DC/DC timing configurations. Each voltage enable signal has a built-in delay while additional delay can
be added with simple external passive components.
The hot swap controller allows a board to be safely inserted and removed from a live backplane without turning off the main power supply. The X80010 family of devices offers a modular, power distribution approach by providing flexibility to solve the hotswap and power sequencing issues for insertion, operations, and extraction. Hardshort Detection and Retry with Delay, Noise filtering, Insertion Overcurrent Bypass, and Gate Current selection are some of the integrated features of the device. During insertion, the gate of an external power MOSFET is clamped low to suppress contact bounce. The undervoltage/overvoltage circuits and the power on reset circuitry suppress the gate turn on until the mechanical bounce has ended. The X80010 turns on the gate with a user set slew rate to limit the inrush current and incorporates an electronic circuit breaker set by a sense resistor. After the load is successfully charged, the PWRGD signal is asserted; indicating that the device is ready to power sequence the DC/DC power bricks.
Systems management function provides a reset signal indicating that the power good and all the voltage good signals are active. The reset signal is asserted after a wait state delay. This signal of X80010, X80011, X80012, X80013 is used to coordinate the hotswap and DC/DC module latencies during power up to avoid "power hang up". In addition, the CPU host can initiate soft
insertion or DC voltage module re-sequencing.
X80010 Data Sheet
