X25256

Temperature under bias ..................... 65 to +135
Storage temperature ........................... 65 to +150
Voltage on any pin with
respect to V _SS ......................................... 1V to +7V
D.C. output current
5mA (soldering, 10 seconds) ......................... 300
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; and the functional operation of the device (at these or any other conditions above those indicated in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The X25256 is a CMOS 256K-bit serial E²_PROM, internally organized as 32K x 8. The X25256 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.

The X25256 also features two additional inputs that provide the end user with added flexibility. By asserting the HOLD input, the X25256 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts. The WP input can be used as a hardwire input to the X25256 disabling all write attempts to the status register, thus providing a mechanism for limiting end user capability of altering first page, first 2 pages, 4 pages, 8 pages, 0, 1/4, 1/2 or all of the memory.