Features: `Full implementation of the IEEE® 802.11 WMAC protocol including the following: IEEE 802.11a, IEEE 802.11g, and IEEE 802.11h standards, supporting all mandatory and optional CCK and OFDM data rates up to 54 Mbits/s. IEEE 802.11b standard data rates. `Full IEEE 802.11 standard is im...
WL60040: Features: `Full implementation of the IEEE® 802.11 WMAC protocol including the following: IEEE 802.11a, IEEE 802.11g, and IEEE 802.11h standards, supporting all mandatory and optional CCK and O...
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Parameter |
Symbol |
Min |
Max |
Unit |
Power Supply Voltage with Respect to Ground Input Voltages Junction Temperature |
VDD VIN TJ |
- VSS- 0.3 -40 |
4.2 VDD + 0.3 125 |
V V °C |
* Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
The WL60040 MAC is designed to form a complete IEEE 802.11a/IEEE 802.11b/IEEE 802.11g chip set, along with the WL64040 baseband, WL54040 transceiver, and the WL54240 dual-band PA. Using a wide variety of host interfaces, the WL60040 supports the MAC and data buffer management functions and is fully compliant with the IEEE 802.11a, IEEE 802.11b, and IEEE 802.11g WLAN standards.
The WL60040 supports high data rates up to 54 Mbits/s while remaining cost-effective. It includes PCI/MiniPCI, CardBus/PCMCIA, PC Card, and Compact Flash support. The device features 1 Mbit of internal memory (RAM It supports the IEEE 802.11b and IEEE 802.11a standardized data rates and the drafted IEEE 802.11g mandatory and optional data rates up to 54 Mbits/s.
The WL60040 offers a rich set of exposed interfaces intended to provide flexibility to the system designer in multiple host interface applications. The WL60040 system architecture maps directly to that of the current WL60010 MAC. The major modifications are bus mastering and the addition of a hardware assist engine to support the IEEE 802.11i compliant AES and TKIP security enhancements. Figure 1 details the system architecture and major interfaces.
The WL60040 directly interfaces with the Agere family of baseband processors, offering a complete end-to-end chip set solution for wireless LAN products. Protocol and PHY support are implemented in firmware to allow custom protocol and IEEE 802.11 PHY transceivers.
The WL60040 has been designed to provide maximum performance with minimum power consumption. The FSBGA package provides optimal PC board layout to all of the aforementioned user interfaces. Firmware implements the full IEEE 802.11 wireless LAN MAC protocol. It supports BSS and IBSS operation under DCF. Low-level protocol functions such as RTS/CTS and acknowledgement, fragmentation, defragmentation, and automatic beacon monitoring are handled without host intervention. Active scanning is performed autonomously
once initiated by host command. Host interface command and status handshakes allow concurrent operations
from multithreaded I/O drivers. Additional firmware functions specific to access point applications are also
available.
A block diagram detailing the WL60040 device architecture and major interfaces is provided in Figure 2.