Features: · Double-data-rate architecture· DDR200 and DDR266 • JEDEC design specifi ed· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Length (2,4,8)· Programmable Burst type (sequential & interleav...
WED3EG7233S-JD3: Features: · Double-data-rate architecture· DDR200 and DDR266 • JEDEC design specifi ed· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2...
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Features: Footprint compatible with WED3C7558M-XBX and WED3C750A8M-200BXImplementation of AltivecT...
Features: · Footprint compatible with WED3C7410E16M-XBX, WED3C7558M-XBX and WED3C750A8M-200BX· Imp...
Features: * Footprint compatible with WED3C7558M-XBX and WED3C750A8M-200BX* Implementation of Alti...
PARAMETER | SYMBOL | RATING | UNTE |
Voltage on any pin relative to Vss | VIN, VOUT | -0.5 to 3.6 | V |
Voltage on VCC supply relative to Vss | VCC,VDDQ | -0.1 to 3.6 | V |
Storage temperature | TSTG | -55 to +150 | |
Power dissipation | PD | 18 | W |
Short circuit current | IOS | 50 | mA |
The WED3EG7233S-JD3 is a 2x16Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of eighteen 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate.
Synchronous design of the WED3EG7233S-JD3 allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.