WC32P040-XXM

Features: `Selection of Processor Speeds: 25, 33MHz `Military Temperature Range: -55 to +125 `Packaging179 pin Ceramic PGA (P4)184 lead Ceramic Quad Flatpack, CQFP (Q4)` 6-Stage Pipeline, 68030-Compatible IU `68881/68882-Compatible FPU Independent `Instruction and Data MMUs `Simultaneously Accessi...

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WC32P040-XXM Picture
SeekIC No. : 004545452 Detail

WC32P040-XXM: Features: `Selection of Processor Speeds: 25, 33MHz `Military Temperature Range: -55 to +125 `Packaging179 pin Ceramic PGA (P4)184 lead Ceramic Quad Flatpack, CQFP (Q4)` 6-Stage Pipeline, 68030-Comp...

floor Price/Ceiling Price

Part Number:
WC32P040-XXM
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

`Selection of Processor Speeds: 25, 33MHz
`Military Temperature Range: -55 to +125
`Packaging
179 pin Ceramic PGA (P4)
184 lead Ceramic Quad Flatpack, CQFP (Q4)
` 6-Stage Pipeline, 68030-Compatible IU
`68881/68882-Compatible FPU Independent
`
Instruction and Data MMUs
`Simultaneously Accessible, 4-Kbyte Physical Instruction Cache and 4-Kbyte Physical Data Cache
`Low-Latency Bus Acceses for Reduced Cache Miss Penalty
`Multimaster/Multiprocessor Support via Bus Snooping
`Concurrent IU, FPU, MMU, and Bus Controller Operation Maximizes Throughput
`32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
`User Object-Code Compatible with all Earlier 68000 Microprocessors
`4-GigaByte Direct Addressing Range




Pinout

  Connection Diagram


Specifications

Parameter
Symbol
Value
Unit
Supply Voltage
Input Voltage
Maximum Operating Temperature
Minimum Operating Temperature
Storage Temperature
VCC
VIN
TJ
TA
TSTG
-0.3 to +7.0
-0.5 to +7.0
+125
-55
-55 to +150
V
V





Description

The WC32P040-XXM is a 68000-compatible, high-performance, 32-bit microprocessor. The WC32P040-XXM is a virtual memory microprocessor employing multiple concurrent execution units and a highly intergrated architecture that provides very high performance  in a monolithic HCMOS device. It has a 68030-compatible integer unit (IU) and two independent caches. The WC32P040 contains dual, independent, demand-paged memory management units (MMUs) for instruction and data stream accesses and independent, 4-Kbyte instruction and data caches. The
WC32P040-XXM has a 68881/68882-compatible  oating-point unit (FPU).




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