Features: · 100% PCI Local Bus 2.0 compatible· IDE primary/secondary address selection· 32-bit local bus interface· Automatic standby mode for power saving· On-chip decode and select logic· Supports local bus operation at up to 50 MHz· Four-level pipelined read-ahead and four-level posted write bu...
W83769: Features: · 100% PCI Local Bus 2.0 compatible· IDE primary/secondary address selection· 32-bit local bus interface· Automatic standby mode for power saving· On-chip decode and select logic· Supports...
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PARAMETER | RATING | UNIT |
Case Temperature Under Bias | -65 to 110 |
°C |
Storage Temperature | -65 to 150 |
°C |
Supply Voltage with Respect to Ground | -0.5 to VDD + 0.5 |
V |
Voltage on Any Pin | -0.5 to VDD + 0.5 |
V |
The W83769 is a high-performance, low-cost, highly integrated logic design for IDE hard disk applications in PCI (Peripheral Component Interconnect) local bus systems. It provides a bridge between a standard IDE drive and the PCI local bus. The W83769 is fully compatible with the ANSI ATA 3.0 specifications for IDE hard disk operation and the PCI SIG revision 2.0 specifications for the PCI local bus protocol. Packaged in a 100-pin PQFP, the W83769 directly supports the 32-bit PCI bus without requiring any external TTLs.
The W83769 operates at up to 50 MHz and provides a full 32-bit data path to the PCI bus. Doubleword read and write operations are provided via internal control and conversion logic. Write posting and read-ahead allows CPU memory cycles to run concurrently with IDE cycles and improves the hard disk buffer-to-host transfer rate.
The IDE drive interface timing of the W83769 is completely software programmable, including command active/recovery timing and address setup-hold timing for each drive. The device supports Fast ATA/Enhanced IDE mode 3 timing and IORDY monitoring for better performance. The W83769 directly supports four IDE drives with 170/1F0 dual IDE connectors. The IObase addresses of the primary/secondary IDE connector are exchangeable by power-on strap option.