Features: • Single +3V power supply (2.7V to 5.25V)• Typical power dissipation: 9.8mW Standby power dissipation: 3µW Power-Down dissipation: 0.09µW• Fully-differential analog circuit design for low noise• 13-bit linear A/D & D/A conversions with 2s complemen...
W681360: Features: • Single +3V power supply (2.7V to 5.25V)• Typical power dissipation: 9.8mW Standby power dissipation: 3µW Power-Down dissipation: 0.09µW• Fully-differential ...
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Condition |
Value |
Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA) VDD -VSS |
150 -65 to +150 (VSS - 0.3V) to (VDD + 0.3V) (VSS 1.0V) to (VDD + 1.0V) -0.5V to +6V |
1. Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions.
The W681360 is a general-purpose single channel 13bit linear PCM CODEC with 2s complement data format. It operates from a single +3V power supply and is available in 20-pin SOG(SOP), SSOP and TSSOP package options. The primary function of the device is the digitization and reconstruction of voice signals, including the band limiting and smoothing required for PCM systems. The W681360 performance is specified over the industrial temperature range of 40°C to +85°C. The W681360 includes an on-chip precision voltage reference. The analog section is fully differential, reducing noise and improving the power supply rejection ratio. The VAG reference pin allows for decoupling of the internal circuitry that generates the reference voltage to the VSS power supply ground, minimizing clock noise on the analog circuitry when external analog signals are referenced to VSS .
The data transfer protocol supports both long-frame and short-frame, synchronous and asynchronous communications for PCM applications. The W681360 accepts eight master clock rates between 256kHz and 4.800MHz, and an on-chip pre-scaler automatically determines the division ratio for the required internal clock.
An additional on-chip power amplifier is capable of driving 300 loads differentially up to a level of 3.544V peak-to-peak.
For fast evaluation a development kit (W681360DK) is available.
For fast prototyping purposes a low-cost evaluation board (W681360ES) is also available.