Features: • Low Power CMOS N-well silicon gate technology• High speed/Low power replacement for Motorola/Rockwell/AMI/MOS Technologies/MOSTEK/HITACHI/ STMicroelectronics/GTE/CMD 6520, 6521, 6820,6821 PIA's• Two 8-bit bidirectional I/O ports with individual data direction control....
W65C21S: Features: • Low Power CMOS N-well silicon gate technology• High speed/Low power replacement for Motorola/Rockwell/AMI/MOS Technologies/MOSTEK/HITACHI/ STMicroelectronics/GTE/CMD 6520, 65...
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• Low Power CMOS N-well silicon gate technology
• High speed/Low power replacement for Motorola/Rockwell/AMI/MOS Technologies/MOSTEK/HITACHI/ ST
Microelectronics/GTE/CMD 6520, 6521, 6820,6821 PIA's
• Two 8-bit bidirectional I/O ports with individual data direction control.
• Automatic "Handshake" control of data transfers
• Two interrupts (one for each port) with program control
• Static to 14MHz operation, with high speed Port A,CA2 outputs.
• Industrial temperature range
• 40 Pin Plastic Dip and 44 Pin Plastic PLCC versions
• 5 volt ± 10% supply quirements
• Compatible with the 65xx and 68xx family of microprocessors
Parameter |
Symbol |
Value |
Unit |
Supply Voltage |
VDD |
-0.3 to +7.0 |
Vdc |
Input Voltage |
VIN |
-0.3 to VDD +0.3 |
Vdc |
Output Voltage |
VOUT |
-0.3 to VDD +0.3 |
Vdc |
Operating Temp. Range Industrial |
TA |
-40 to +85 |
|
Storage Temperature |
TSTG |
-55 to +150 |
This device contains input protection against damage due to high static voltages or electric fields; however, precautions should be taken to avoid application of voltages higher than the maximum rating.
Notes:
1. Exceeding these ratings may cause permanent damage,functional operation under these conditions is not implied.
The WDC W65C21S is a very flexible Peripheral Interface Adapter (PIA) for use with WDC's 65xx and other 8-bit microprocessor families. The W65C21S provides programmed microprocessor control of up to two peripheral devices (Port A and Port B). Peripheral device control is accomplished through two 8-bit bidirectional I/O Ports, with individually designed Data Direction Registers. The Data Direction Registers provide selection of data flow direction (input or output) at each respective I/O Port. Data flow direction may be selected on a line-by-line basis with intermixed input and output lines within the same port. The "handshake" interrupt control feature is provided by four peripheral control lines. This capability provides enhances control over data transfer functions between the microprocessor and peripheral devices, as well as bidirectional data transfer between W65C21S Peripheral Interface Adapters in multiprocessor systems.