VSP2267

Supply voltage: V_DD,  . . . .  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 V
Supply voltage differences: V_DD . . . . . . . . . . . . . . . . . . . . . . . .. . . . ±0.1 V
Ground voltage differences: V_SS . . . . . . . . . . .. . . . . . . . . . . . . . . . .±0.1 V
Digital input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 0.3 V
Analog input voltage . . . . . . . . . . . . . . . . . . . . . . . . .0.3 V to V_CC + 0.3 V
Input current (any leads except supplies) . . . . . . . . . . . . . . . . . . . .±10 mA
Operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25°C to 85°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .55°C to 125°C
Junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . .150°C
Lead temperature (soldering, 5 sec) . . . . . . . . . . . . . . . . . .. . . . . . . .150°C
Package temperature (IR reflow, peak, 10 sec) . . . . . . . . . . . . . . . . .250°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

The VSP2267 is a complete mixed-signal IC for CCD signal processing with a CCD timing generator and A/D converter. The system synchronizes the master clock, HD, and VD. The VSP2267 supports all signal terminals that the CCD and the vertical driver require, plus externally triggered mechanical shutter and strobe functions. The R driver and H driver synchronize the A/D converter clock phase to realize ideal performance. The CCD channel has correlated double sampling (CDS) to extract image information from the CCD output signal. The digital control gain curve is linear in dB, ranging from 6 dB to 42 dB. A black-level clamping circuit ensures an accurate black reference level and quick black-level recovery after a gain change. Input signal clamping with a CDS offset adjustment function is available.