VSC830

Features: • Dual 2x2 Crosspoint Switch• 2.7Gb/s NRZ Data Bandwidth, 2.7GHz Signal Bandwidth• PECL/TTL-Compatible Control Inputs• PECL-Compatible High-Speed I/O• 50 Source Terminated Output Driver and Programmable Input Terminations• Single 3.3V Supply, 1W Typica...

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VSC830 Picture
SeekIC No. : 004543475 Detail

VSC830: Features: • Dual 2x2 Crosspoint Switch• 2.7Gb/s NRZ Data Bandwidth, 2.7GHz Signal Bandwidth• PECL/TTL-Compatible Control Inputs• PECL-Compatible High-Speed I/O• 50 Sour...

floor Price/Ceiling Price

Part Number:
VSC830
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

• Dual 2x2 Crosspoint Switch
• 2.7Gb/s NRZ Data Bandwidth, 2.7GHz Signal Bandwidth
• PECL/TTL-Compatible Control Inputs
• PECL-Compatible High-Speed I/O
• 50 Source Terminated Output Driver and Programmable Input Terminations
• Single 3.3V Supply, 1W Typical Dissipation
• Power-Down Capability for Unused Outputs
• Compact 44-Pin PQFP, 10x10mm Package



Pinout

  Connection Diagram


Specifications

Power Supply Voltage (VCC) Potential
to GND ..................................................... .-0.5V to +4.0V
TTL Input Voltage Applied ..................-0.5V to VCC +0.5V
ECL Input Voltage Applied ................ -0.5V to VCC +0.5V
Output Current (IOUT) ............................................50mA
Case Temperature Under Bias (TC) ........-55 to + 125
Storage Temperature (TSTG)................. -65 to + 150



Description

The VSC830 is a monolithic dual 2x2 asynchronous crosspoint switch, designed for critical signal path control and buffering applications, such as loop-back, protection switching, and multi-channel backplane driver/receivers. Signal path delay is tightly matched between each output channel to eliminate the need for delay path compensation when switching between signal sources.

The crosspoint function is based on a multiplexer tree architecture. Each 2x2 switch can be considered as a pair of 2:1 multiplexers that share the same inputs. The signal path through each switch is fully differential and delay matched. The signal path is unregistered, so there are no restrictions on the phase, frequency, or signal pattern at each input. Unused outputs can be independently powered off, thereby eliminating power on unused sections (see Design Guide section in this data sheet). The switch control inputs can be configured to be compatible with PECL or TTL levels. The high-speed input and output levels are nominally PECL compatible and capable of interfacing with a wide range of termination schemes.




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