VSC8222

Features: Multi Rate Operation:- OC-48/12/3 and (STM-16/4/1) and FEC- 1.0625 Gbps and 2.125 Gbps Fibre Channel- 1.25 Gbps and 2.5 Gbps Gigabit EthernetAdjustable Loop BandwidthLoss of Signal (LOS) and Loss of Lock (LOL) Status IndicationAutomatic and Manual Lock to Reference Clock:- Internal PLL M...

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SeekIC No. : 004543467 Detail

VSC8222: Features: Multi Rate Operation:- OC-48/12/3 and (STM-16/4/1) and FEC- 1.0625 Gbps and 2.125 Gbps Fibre Channel- 1.25 Gbps and 2.5 Gbps Gigabit EthernetAdjustable Loop BandwidthLoss of Signal (LOS) a...

floor Price/Ceiling Price

Part Number:
VSC8222
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

Multi Rate Operation:
- OC-48/12/3 and (STM-16/4/1) and FEC
- 1.0625 Gbps and 2.125 Gbps Fibre Channel
- 1.25 Gbps and 2.5 Gbps Gigabit Ethernet
Adjustable Loop Bandwidth
Loss of Signal (LOS) and Loss of Lock (LOL) Status Indication
Automatic and Manual Lock to Reference Clock:
- Internal PLL Maintains Clock Output in the Absence of Data
Selectable CRU Bypass Mode
On-chip Input and Output Termination
Selectable LVPECL Reference Frequencies:
- 19.44 MHz, 77.76 MHz, or 155.52 MHz (or FEC)
- Equivalent Fibre Channel/Gigabit Ethernet
- Other Allowable Frequencies
0.18 m CMOS Technology
100 mV Differential Input Sensitivity
500 mV Typical Differential Data Output Swing



Application

SONET/SDH Systems
DWDM Systems
Optical Transponders/Transceivers
Fibre Channel Networks
Gigabit and Fast Ethernet Systems
Performance Monitoring Systems
Optical Test Equipment



Description

The VSC8222 and VSC8223 are high performance, multi-rate clock and data recovery ICs that support SONET/SDH systems operating at OC-48 (STM-16), OC-12 (STM-4), OC-3 (STM- 1), Fibre Channel (1.0625 Gbps and 2.125 Gbps), Gigabit Ethernet (1.25 Gbps and 2.5 Gbps), and FEC data rates. High speed input and output signals are terminated on-chip to maintain the highest degree of signal integrity possible. The devices output a differential bit clock and differential retimed data.

Two selectable, externally supplied reference clock inputs support the Phase Lock Loop (PLL) operation and are used to maintain a lock condition when the high-speed data is missing at the input. The PLL has four different Loop bandwidth settings, allowing the designer to adjust the jitter transfer and tolerance attributes of the device. The PLL can be bypassed to accommodate rates not supported by the PLL.

The VSC8222 and VSC8223 require a 2.5 V supply and are available
in a 7x7x1.4mm 48-pin, thermally enhanced PQFP package.




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