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VSC8115

Features: • Performs clock and data recovery for 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1) NRZ data• Meets Bellcore, ITU and ANSI Specifications for Jitter Performance• 19.44MHz reference frequency LVTTL Input• Lock Detect output pin monitors data run...

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SeekIC No. : 004543439 Detail

VSC8115: Features: • Performs clock and data recovery for 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1) NRZ data• Meets Bellcore, ITU and ANSI Specifications for Jitter Perform...

VSC8115 Data Sheet

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Part Number:
VSC8115
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• Performs clock and data recovery for 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1) NRZ data
• Meets Bellcore, ITU and ANSI Specifications for Jitter Performance
• 19.44MHz reference frequency LVTTL Input
• Lock Detect output pin monitors data run length and frequency drift from the reference clock
• Data is Retimed at the Output
• Active High Signal Detect LVPECL Input
• Low-jitter high speed outputs can be configured as either LVPECL or low power LVDS
• Low power - 0.188 Watts Typical Power
• +3.3V Power Supply
• 20 Pin TSSOP Package
• Requires One External Capacitor
• PLL bypass operation facilitates the board debug process


Pinout

Connection Diagram


Specifications

Power Supply Voltage (VDD) Potential to GND......................................................................-0.5V to +4V
DC Input Voltage (LVPECL Inputs)........................................................................... -0.5V to VDD + 0.5V
DC Input Voltage (LVTTL Inputs) ............................................................................. -0.5V to VDD + 0.5V
Output Current (LVDS or LVPECL Outputs)................................................................................ +/-50mA
Case Temperature Under Bias.........................................................................................-55o to +125
Storage Temperature .................................................................................................. -65oC to +150
Maximum Input ESD (Human Body Model)
High Speed Outputs (pins 11, 12, 13, & 14) ................................................................................... 500V
All Other Pins ................................................................................................................................ 1500V


Description

The VSC8115 functions as a clock and data recovery unit for SONET/SDH-based equipment to derive high speed timing signals. The VSC8115 recovers the clock from the scrambled NRZ data operating at 622.08Mb/s (STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the clock is recovered, the data is retimed using an output flip-flop. Both recovered clock and retimed data outputs can be configured as LVDS or LVPECL signals to facilitate a low-jitter and low power interface.




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