VSC7226

Features: ·Dual Speed Operation- Fibre Channel: 1.06/2.12/3.1875Gb/s- Gigabit Ethernet: 1.25Gb/s- 10G Ethernet: 3.125Gb/s- InfiniBandTM: 2.5Gb/s·Redundant XAUI Compliant Serial Links·Half-Rate Operation for Compatibility with Legacy 1Gb/s Systems·XGMII Parallel Data Inputs/Outputs·Rate Matching Be...

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VSC7226 Picture
SeekIC No. : 004543365 Detail

VSC7226: Features: ·Dual Speed Operation- Fibre Channel: 1.06/2.12/3.1875Gb/s- Gigabit Ethernet: 1.25Gb/s- 10G Ethernet: 3.125Gb/s- InfiniBandTM: 2.5Gb/s·Redundant XAUI Compliant Serial Links·Half-Rate Opera...

floor Price/Ceiling Price

Part Number:
VSC7226
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

·Dual Speed Operation
- Fibre Channel: 1.06/2.12/3.1875Gb/s
- Gigabit Ethernet: 1.25Gb/s
- 10G Ethernet: 3.125Gb/s
- InfiniBandTM: 2.5Gb/s
·Redundant XAUI Compliant Serial Links
·Half-Rate Operation for Compatibility with Legacy 1Gb/s Systems
·XGMII Parallel Data Inputs/Outputs
·Rate Matching Between Upstream/Downstream VSC7226s
·Selectable High-Speed Input Termination
·2 Channel or 4-Channel Aggregation Capability
·Serial Output Swing Reduction Control
·Parallel Data Squelching Option
·Transmitter Pre-Distortion and Receiver Equalization
·Multiple Dual Data Rate (DDR) Clocking Options
·Extensive Per-Channel Configuration Control Through MDIO Interface
·Internal Serial and Parallel Loopback Modes
·JTAG and BIST Enabled
·Optional 8B/10B Encoder/Decoder



Application

·Backplane Interconnect for Data Communications Requiring 20 Gigabits Duplex of Throughput
·Serial Bus Extension
·10 Gigabit Ethernet XAUI Transceiver
·InfiniBand
- Host Channel Adapters
- Target Channel Adapters
- Switches
·Fibre Channel
- 1G/2G Rate Negotiation
- Rx/Tx Channel Independence



Description

The VSC7226-01 and VSC7226-02 are quad channel parallel-to-serial and serial-toparallel transceiver chips designed for use in high bandwidth data transmission between busses, backplanes and other subsystems. Each channel's transmitter section contains parallel 8-bit or 10-bit SSTL_2 input circuitry, an 8B/10B encoder, serializer and a pair of serial PECL output drivers and additional control inputs. Each channel's receiver section contains a pair of PECL inputs, clock and data recovery circuitry, a deserializer, an 8B/10B decoder, elastic buffers, 8- bit or 10-bit SSTL_2 output drivers and additional control outputs. Each transmitter may be supplied 8-bit data which will be encoded into 10-bit characters for transmission, or may be supplied pre-encoded 10-bit data in which case the internal encoder is bypassed. The four channels may operate independently or in a synchronized mode transferring data that is word-aligned across 16 or 32 data inputs.




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