VSC7216-02

Features: Compatible to Industry Standard VSC7216-01Redundant Transmit and Receive Serial I/O'sLVTTL Parallel Data I/ORate Matching Between Upstream/Downstream VSC7216-02'sSelectable High Speed Input TerminationMulti-channel and Multi-chip Aggregation CapabilitySerial Output Swing Reduction Contro...

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VSC7216-02 Picture
SeekIC No. : 004543363 Detail

VSC7216-02: Features: Compatible to Industry Standard VSC7216-01Redundant Transmit and Receive Serial I/O'sLVTTL Parallel Data I/ORate Matching Between Upstream/Downstream VSC7216-02'sSelectable High Speed Inpu...

floor Price/Ceiling Price

Part Number:
VSC7216-02
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

Compatible to Industry Standard VSC7216-01
Redundant Transmit and Receive Serial I/O's
LVTTL Parallel Data I/O
Rate Matching Between Upstream/Downstream VSC7216-02's
Selectable High Speed Input Termination
Multi-channel and Multi-chip Aggregation Capability
Serial Output Swing Reduction Control
Transmitter Pre-Distortion and Receiver Equalization
Multiple Clocking Options
Internal Serial and Parallel Loopback Modes
JTAG and BIST Enabled
Optional 8B/10B Encoder/Decoder
Fast Lock for use in Asynchronous Switching Applications
Adjustable Latency and Deskewing for Varied System Environments
Analog Signal Detect for each PECL Input



Application

Backplane Interconnect for Data Communications
Serial Bus Extension
Gigabit Ethernet Transceiver
Fibre Channel Transceiver
Serial Link Redundancy



Description

The VSC7216-02 is a quad channel parallel-to-serial and serial-to-parallel transceiver chip designed for use in high bandwidth data transmission between busses, backplanes and other subsystems.

Each channel's transmitter section contains parallel 8-bit or 10-bit input circuitry, an 8B/10B encoder, serializer and a pair of serial PECL output drivers and additional control inputs.

Each channel's receiver section contains a pair of PECL inputs, clock and data recovery circuitry, a deserializer, an 8B/10B decoder, elastic buffers, 8-bit or 10-bit output drivers and additional control outputs. Each transmitter may be supplied 8-bit data which will be encoded into 10-bit characters for transmission, or may be supplied preencoded 10-bit data in which case the internal encoder is bypassed. The four channels may operate independently or in a synchronized mode transferring data that is wordaligned across 16 or 32 data inputs.




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