Features: • ANSI X3T11 Fibre Channel Compliant at 1.0625Gb/s• IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s• Five Port Bypass Circuits (PBCs)• On-Chip Transmit Termination• 3.3V, 0.25W Typical Power• 0.35um CMOS, a Velocity Family Member• 44-Pin, 10mm...
VSC7124: Features: • ANSI X3T11 Fibre Channel Compliant at 1.0625Gb/s• IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s• Five Port Bypass Circuits (PBCs)• On-Chip Transmit Terminati...
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The VSC7124 contains five cascaded Port Bypass Circuits (PBCs) used to steer serial signals. This part is typically sed in distributing Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Figure . The VSC7124 can be used with any of the Vitesse JBOD circuits to implement FC-AL JBODs of irtually any size. In Figure 1, the first VSC7127's CRU is configured as a Repeater to attenuate jitter. The SC7124 does not contain a CRU in order to reduce power and cost. The second VSC7127's CRU is configureds a retimer so that the output of the device is a jitter compliance point.
Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the external nput or, if LOW, selects the output of the previous PBC.