VP0204N2

The VP0204N2 is designed as one kind of P-channel enhancement-mode vertical DMOS power FETs. This enhancement mode (normally off) power transistors utilize a vertical DMOS structure and supertex's well-proven silicon-gate manufacturing process.

VP0204N2 has eight features. (1)Freedom from secondary breakdown. (2)Low power drive requirement. (3)Ease of paralleling. (4)Low Viss and fast switching speeds. (5)Excellent internal stability. (6)Integral source drain diode. (7)High input impedance and high gain. (8)Complementary N- and P-channel devices. Those are all the main features.

Some VP0204N2 absolute maximum ratings have been concluded into several points as follow. (1)Its drain to source voltage would be BVdss. (2)Its drain to gate voltage would be BVdgs. (3)Its gate to source voltage would be +/-20V. (4)Its operating temperature range would be from -55°C to 150°C. (5)Its storage temperature range would be from -55°C to 150°C. (6)Its soldering temperature would be 300°C. It should be noted that stresses above those listed in absolute maximum ratings may cause permanent damage to device.

Also some VP0204N2 electrical characteristics are concluded as follow. (1)Its drain to source breakdown voltage would be min -40V. (2)Its gate threshold voltage would be min -1.0V and max -3.5V. (3)Its change in Vgs(th) with temperature would be typ -3.0mV/°C and max -3.5mV/°C. (4)Its gate body leakage would be max -100nA. (5)Its zero gate voltage drain current would be max -25uA. (6)Its on-state drain current would be min -0.4A at Vgs=-5V and it would be min -1.5A and typ -2.5A at Vgs=-10V. (7)Its static drain to source on-state resistance would be typ 3.5 and max 8 at Vgs=-5V and it would be typ 3 and max 4 at Vgs=-10V. (8)Its change in Rds(on) with temperature would be typ 0.75%/°C and max 1.2%/°C. (9)Its forward transconductance would be min 0.3 and typ 0.5. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!