VM227

The VM227 has the following features including Power Up/Down Protection Circuitry;Operates on +5V and +12V Power Supplies;Programmable Write-Current Source;TTL-Corrpatible Control Lines;Write-Unsafe Detection Circuitry;Low Input Noise;For Use with High-Pertormance, Center-Tapped Ferrite and Thin-Film Heads;Optional Internal Head Damping Resistors;Available to 6 or 8 Chanrsels.

The VM227 is a bipolar, monolithk: readlwrite preamp circuit, designed for use with high-performance,center-tapped ferrite and thin-film recording heads. The circuit provides a low-noise read data path for signals from the disk in the read mode and provides write-current control for data written on the disk in the write mode.In the write mode, the VM227 operates as a write-current switch. Write current is supplied by an internal current source. The magnitude of the write current is determined by an external resistor, RWC,connected between WC and ground. The head cumsnt is switched between the X and Y side of a selected head by falling transitions on WDI (write data Input). When switching to the write mode from the read mode, the write data flip-flop Is initialized to pass head current through the X side of the head.

In the read mode the circuit operates as a low-noise differential amplifier. The write current source is turned off and the write data flip-flop is set. The selected head provides a differential input. The RDX and RDY pins provide differential emitter follower outputs which are in phase with the X and Y inputs.Write current is deactivated for both the read and the idle mode so that external gating is not required.The VM227 operates as a write-current switch in the write mode and as a low-noise differential amplifier in the read mode. Channel selection is controlled by HSO, HS1 and HS2 lines and mode select is controlled by the CS and R/W select lines. Both CS and R/W have internal pull-up resistors to prevent accidental write conditions. Unsafe write conditions are indicated by the WUS line. The VM227 also incorporates power up/down protection circuitry to prevent write-current spikes in the event of sudden power up or power down conditions.