VDS7608A4A

Features: •JEDEC standard LVTTL 3.3V power supply•MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & Interleave)•4 banks operation•All inputs are sampled at the positive edge of the system clock...

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SeekIC No. : 004541004 Detail

VDS7608A4A: Features: •JEDEC standard LVTTL 3.3V power supply•MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & Inter...

floor Price/Ceiling Price

Part Number:
VDS7608A4A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/12/21

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Product Details

Description



Features:

•JEDEC standard LVTTL 3.3V power supply
•MRS Cycle with address key programs
  -CAS Latency (2 & 3)
  -Burst Length (1,2,3,8,& full page)
  -Burst Type (sequential & Interleave)
•4 banks operation
•All inputs are sampled at the positive edge of the system clock
•Burst Read single write operation
•Auto & Self refresh
•4096 refresh cycle
•DQM for masking
•Package:54-pins 400 mil TSOP-Type II



Pinout

  Connection Diagram


Specifications

Parameter

Symbol Value Unit

Voltage on any pin relative to Vss

VIN, Vout

-1.0 ~ 4.6

V

Voltage on VDD supply relative to Vss

VDD, VDDQ

-1.0 ~ 4.6 V

Storage temperature

TSTG

-55 ~ +150

Power dissipation

PD

1 W

Short circuit currentI

IOS

50 mA
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATING are exceeded.

           Functional operation should be restricted to recommended operating condition.

           Exposure to higher than recommended voltage for extended periods of time could affect device reliability.



Description

The VDS7608A4A are four-bank Synchronous DRAMs organized as 4,194,304 words x 8 bits x4 banks.

Synchronous design of VDS7608A4A allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications




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