Features: • 48 V to 12 V V•I Chip Converter
• 25 A (37.5 A for 1 ms)
• High density 1200 W/in3
• Small footprint 280 W/in2
• Low weight 0.5 oz (14 g)
• Pick & Place / SMD
• 125 operation
• 1 s transient response
• 3.5 million hours MTBF
• Typical efficiency 96%
• No output filtering required
• Surface mount BGA or J-Lead packagesApplicationIn applications requiring higher current or redundancy, VTMs can be operated in parallel without adding control circuitry or signal lines. To maximize current sharing accuracy, it is imperative that the source and load impedance on each VTM in a parallel array be equal. If VTMs are being fed by an upstream PRM, the VC nodes of all VTMs must be connected to the PRM VC.
To achieve matched impedances, dedicated power planes within the PC board should be used for the output and output return paths to the array of paralleled VTMs. This technique is preferable to using traces of varying size and length.
The VTM power train and control architecture allow bi-directional power transfer when the VTM is operating within its specified ranges. Bi-directional power processing improves transient response in the event of an output load dump. The VTM may operate in reverse, returning output power back to the input source. It does so efficiently.
Pinout
Specifications
|
Parameter |
Values |
Unit |
Notes |
| +In to -In |
-1.0 to 60 |
Vdc |
|
| +In to -In |
100 |
Vdc |
For 100 ms |
| PC to -In |
-0.3 to 7.0 |
Vdc |
|
| VC to -In |
-0.3 to 19.0 |
Vdc |
|
| +Out to -Out |
-0.1 to 30.0 |
Vdc |
|
| Isolation voltage |
2,250 |
Vdc |
Input to Output |
| Output current |
25 |
A |
Continuous |
| Peak output current |
37.5 |
A |
For 1 ms |
| Output power |
300 |
W |
Continuous |
| Peak output power |
450 |
W |
For 1 ms |
| Case temperature |
208 |
|
During reflow |
| Operating junction temperature(1) |
-40 to 125
-55 to 125 |
|
T - Grade
M - Grade |
| Storage temperature |
-40 to 150
-65 to 150 |
|
T - Grade
M - Grade |
Note:
(1) The referenced junction is defined as the semiconductor having the highest temperature. This
temperature is monitored by a shutdown comparator.
DescriptionThe V048K120T025 V•I Chip Voltage Transformation Module (VTM) breaks records for speed, density and efficiency to meet the demands of advanced DSP, FPGA, and ASIC at the point of load (POL) while providing isolation from input to output. It achieves a response time of less than 1 s and delivers up to 25 A in a volume of less than 0.25 in3 with unprecedented efficiency. It may be paralleled to deliver hundreds of amps at an output voltage settable from 6.5 to 13.7 Vdc.
The VTM V048K120T025's nominal output voltage is 12 Vdc from a 48 Vdc input Factorized Bus, Vf, and is controllable from 6.5 to 13.7 Vdc at no load, and from 6.5 to 13.4 Vdc at full load, over a Vf input range of 26 to 55 Vdc. It can be operated either open- or closedloop depending on the output regulation needs of the application. Operating open-loop, the output voltage tracks its Vf input voltage with a transformation ratio, K = 1/4 , for applications requiring a programmable output voltage at high current and high efficiency. Closing the loop back to an input Pre-Regulation Module (PRM) or DC-DC converter enables tight load regulation.
The 12 V VTM of the V048K120T025 achieves break-through power density of 1200 W/in3 in a V•I Chip package compatible with standard pick-and-place and surface mount assembly processes. The V•I Chip BGA package supports in-board mounting with a low profile of 0.16" (4 mm) over the board.
A J-lead package option of the V048K120T025 supports on-board surface mounting with a profile of only 0.25" (6 mm) over the board. The VTM's fast dynamic response and low noise eliminate the need for bulk capacitance at the load, substantially increasing the POL density while improving reliability and decreasing cost.
V048K120T025 Data Sheet
