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UT54ACS74

Features: • 1.2radiation-hardened CMOS- Latchup immune• High speed• Low power consumption• Single 5 volt supply• Available QML Q or V processes• Flexible package- 14-pin DIP- 14-lead flatpackApplication SYMBOL PARAMETER LIMITS UNIT ...

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SeekIC No. : 004539068 Detail

UT54ACS74: Features: • 1.2radiation-hardened CMOS- Latchup immune• High speed• Low power consumption• Single 5 volt supply• Available QML Q or V processes• Flexible package-...

UT54ACS74 Data Sheet

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Part Number:
UT54ACS74
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/22

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Product Details

Description



Features:

• 1.2radiation-hardened CMOS
- Latchup immune
• High speed
• Low power consumption
• Single 5 volt supply
• Available QML Q or V processes
• Flexible package
- 14-pin DIP
- 14-lead flatpack


Application

SYMBOL PARAMETER
LIMITS
UNIT
VDD DC supply voltage
-0.3 to +7.0
V
VIO Voltage on any pin
-0.3 to VDD+0.3
V
II DC input current
±10
mA
TSTG Storage temperature
-65 to +150
°C
TLS Lead temperature (soldering 5 seconds)
+300
°C
PD Maximum power dissipation
1
mW
TJ Maximum junction temperature
+175
°C
QJC Thermal resistance, junction-to-case
20
°C/W

Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.




Pinout

Connection Diagram


Specifications

SYMBOL PARAMETER
LIMITS
UNIT
VDD DC supply voltage
-0.3 to +7.0
V
VIO Voltage on any pin
-0.3 to VDD+0.3
V
II DC input current
±10
mA
TSTG Storage temperature
-65 to +150
°C
TLS Lead temperature (soldering 5 seconds)
+300
°C
PD Maximum power dissipation
1
mW
TJ Maximum junction temperature
+175
°C
QJC Thermal resistance, junction-to-case
20
°C/W

Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.




Description

The UT54ACS74 and the UT54ACTS74 contain two independent D-type positive triggered flip-flops. A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs. When Preset and Clear are inactive (high), data at the D input meeting the setup time requirement is transferred to the outputs on the positive-going edge of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.

The UT54ACS74 are characterized over full military temperature range of -55 C to +125 C.




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