UT52L0864

` Single 3.3V ±0.3V power supply
` Operating temperature : Commercial : 0~70 Extended : -20~80
`Max. Clock frequency -6:166MHz<3-3-3>/-7:143MHz<3-3-3>/-7.5:133MHz<3-3-3>/-8:100MHz<2-2-2>
` Fully synchronous operation referenced to clock rising edge
` 4-bank operation controlled by BA0,BA1(Bank Address)
`/CAS latency- 2/3 (programmable)
`Burst length- 1/2/4/8/FP (programmable)
`Burst type- Sequential and interleave burst (programmable)
` Byte Control- DQML and DQMU (UT52L1664)
`Random column access
` Auto precharge / All bank precharge controlled by A10
` Auto and self refresh
` 4096 refresh cycles /64ms
` LVTTL Interface
` Package 400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch

word x 4-bit Synchronous DRAM with LVTTL interface and UT52L0864 is organized as 4-bank x 2,097,152-word x 8-bit and UT52L1664 is organized as 4-bank x 1,048,576-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK. UT52L0464, UT52L0864 and UT52L1664 achieve very high speed data rates up to 166MHz, and are suitable for main memories or graphic memories in computer systems.