UPD7554A(A)

Features:

* Range of supply voltage 7554A : 2.0 to 6.0 V
                                          7554A(A) : 2.7 to 6.0 V
* Drive with two 1.5 V manganese cells
* 47 types of instructions (Subset of PD7500H SET B)
* Instruction cycle
   External clock : 2.86 s (in operation at 700 kHz, 5 V)
   RC oscillation : 4 s (in operation at 500 kHz, 5 V)
* Program memory (ROM) capacity: 1024 * 8 bits
* Data memory (RAM) capacity: 64 * 4 bits
* Test source: One external source and two internal sources
* 8-bit timer/event counter
* 16 I/O lines (Total output current of all pins: 100 mA)
* Can directly drive a triac and a LED: P80 to P83
* Can directly drive LEDs: P100 to P103 and P110 to P113
* Mask option function provided for every port
* 8-bit serial interface
* Standby (STOP/HALT) function
* Low supply voltage data retaining function for data memory
* Built-in ceramic oscillator for system clock RC
   Oscillation with an external resistor R (Incorporat- ing capacitor C)


Application

Automotive and transportation equipments, etc.


Pinout




Specifications

Parameter	Symbol	Test Conditions		Ratings	Unit
Supply Voltage	VDD			-0.3 to +7.0	V
Input Voltage	VI	Except ports 10 and 11		0.3 to VDD + 0.3	V
		Ports 10 and 11	Note 1	0.3 to VDD + 0.3	V
			Note 2	0.3 to +11	V
Output Voltage	VO	Except ports 8, 10, 11		0.3 to VDD + 0.3	V
		Ports 8, 10 and 11	Note 1	0.3 to VDD + 0.3	V
			Note 2	0.3 to +11	V
Output current high	IOH	1 pin		5	mA
		All pins in total		15	mA
Operating Temperature	Topt			10 to +70	°C
Storage Temperature	Tstg			-65 to +150	°C
Power consumption	Pd	Ta = 70 °C	Shrink DIP	350	mW
			Mini flat	195

Description

The PD7554A is a product of the PD7554, 7564 sub-series which is a 4-bit single-chip microcomputer with a small number of ports in a small package, which is enabled to operate even at the super-low voltage of 2.0 V so that it is optimized for handy-type systems operating with dry cells. The PD7554A is a low-order model in the UPD7500 series (UPD7554A only).

This device incorporates a serial interface, and serves as the sub-CPU for a high-order model of that series or the 8-bit microcomputer. It is optimized for distributed processing of the system.