UMA1018M

The principal synthesizer operates at RF input frequencies up to1.25 GHz the auxiliary synthesizer operates at 300 MHz. The auxiliary loop is intended for the first IF or to transmit offset loop-frequency settings. Each synthesizer has a fully programmable reference divider. All divider ratios are supplied via a 3-wire serial programming bus.

Separate power and ground pins are provided to the analog and digital circuits. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. Digital supplies VDD1 and VDD2 must also be at the same potential. VCC must be equal to or greater than VDD (i.e. VDD = 3 V and VCC = 5 V for wider tuning range).

The principal synthesizer phase detector uses two charge pumps, one provides normal loop feedback, while the other is only active during fast mode to speed-up switching. The auxiliary loop has a separate phase detector. All charge pump currents (gain) are fixed by an external resistance at pin ISET (pin 14). Only passive loop filters are used; the charge-pumps function within a wide voltage compliance range to improve the overall system performance. An on-chip 7-bit DAC enables adjustment of an external function, such as the temperature compensation of a crystal oscillator in Global System for Mobile communications (GSM).