UM61512A

Features: Single +5V power supplyAccess times: 15/20/25ns (max.)Current: Operating: 160mA (max.)Standby: 10mA (max.)Full static operation, no clock or refreshing requiredAll inputs and outputs are directly TTL compatibleCommon I/O using three-state outputOutput enable and two chip enable inputs fo...

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SeekIC No. : 004537137 Detail

UM61512A: Features: Single +5V power supplyAccess times: 15/20/25ns (max.)Current: Operating: 160mA (max.)Standby: 10mA (max.)Full static operation, no clock or refreshing requiredAll inputs and outputs are d...

floor Price/Ceiling Price

Part Number:
UM61512A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/22

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Product Details

Description



Features:

Single +5V power supply
Access times: 15/20/25ns (max.)
Current: Operating: 160mA (max.)
Standby: 10mA (max.)
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL compatible
Common I/O using three-state output
Output enable and two chip enable inputs for easy application
Data retention voltage: 3V (min.)
Available in 32-pin SKINNY DIP, TSOP, SOP, SOJ and both 300/400 mil packages



Pinout

  Connection Diagram


Specifications

VCC to GND . . . . . . . . . . . . . . . . . ...... . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . ......... . -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . .. . 0 °C to +70°C
Storage Temperature, Tstg . . . . . .  . . . -55 °C to +125°C
Temperature Under Bias, Tbias . . . . ... . . -10 °C to +85°C
Power Dissipation, Pt . . . . . . . . . . . . ... . . ...... . . . . . . 1.0W
Soldering Temp. & Time . . . . . . . . . . . ...... . 260 °C, 10 sec



Description

The UM61512A is a low operating current 524,288-bit static random access memory organized as 65,536 words by 8 bits and operates on a single 5V power supply. It is built using UMC's high performance CMOSprocess.

Inputs and three-state outputs are TTL compatible andallow for direct interfacing with common system bus Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 3V.




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