UCS51

The UCS51 has the following features including 1.5 Micron CHMOS III;SFR Bus-Compatible Peripherals:A/D Converter,Bus Interface/Port,Baud-Rate Generator,UART,Timer Counter;Customer-Designed SFR Peripherals:Extensive Cell Library Available.

The UCS51 mlcrocontroller Core Cell allows customers to gain access to the internal peripheral bus(Special Function Register) SFR bus. This provides peripheral selection which exactly fits the customer's needs. When the supplied peripheral set is insufficient, an optimum peripheral can be designed by the customer.The SFR bus supports direct addressing of peripherals, which allows for enhanced performance, more efficient code utilization, and increased bit-manipulation capability.The Test Programmable Connector Control signal control both PRGUCS companion cells. When the PRGUCS companion cell is configured an out-put, TPPC is the multiplexer select signal that enables either the TPRGxlO signal or the user output signal (UOS). TPPC is a logic 1 during the test mode,which selects the test programmable pin outputs(TPRGxlO).TPPC remains low during normal user operation, which selects the user-output signals (UOS).

The UCS51 core contains three Internal and two external interrupt sources. The addition of the interrupt expansion unit increases the number of external interrupts from two to seven. This allows for core configurations of either 5 or 10 interrupt sources.The UCS51 core cell is available with 0 to 32 Kbytes of Read Only Memory (ROM) in 4K increments, The use of additional ROM expands the codespace capability of the UCS51 core beyond the 4 Kbytes available with the 80C51 standard product, In most cases alleviating the negd for external program memory. The ROMless version of the UCS51 core cell provides an 80031-compatible core.The UCS51 is a modified cell version of Intel's industry standard 80C51 Microcontroller. When used in conjunction with the Intel 1.5 Micron CHMOS III Cell Library, the UCS51 core enables a designer to implement a semi-custom integrated circuit that includes an 80C51 core, various peripherals  that interface to the core, and design-specific support logic.This allows the designer to explore application areas previously reserved for custom design solutions.