Features: SpecificationsDescriptionThe UCN-4805A has the following features including High-Voltage Source Outputs;CMOS, PMOS, NMOS,nL Compatible Inputs;Low-Power CMOS Latches;Hexadecimal Decoding;Internal PuII-Up/Pull-Down Resistors;Wide Supply Voltage Range. DESIGNED for use in high-voltage vacu...
UCN-4805A: Features: SpecificationsDescriptionThe UCN-4805A has the following features including High-Voltage Source Outputs;CMOS, PMOS, NMOS,nL Compatible Inputs;Low-Power CMOS Latches;Hexadecimal Decoding;In...
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The UCN-4805A has the following features including High-Voltage Source Outputs;CMOS, PMOS, NMOS,nL Compatible Inputs;Low-Power CMOS Latches;Hexadecimal Decoding;Internal PuII-Up/Pull-Down Resistors;Wide Supply Voltage Range.
DESIGNED for use in high-voltage vacuum fluorescent display driver applications, the UCN-4805A latched decoder/driver combines CMOS logic with l2ipolar source outputs. The device consists of eight high-voitage bipolar sourcing out-puts, with internal pull-down resistors and CMOS input latches, hexadecimal decoder, and control circuitry (strobe and blanking).Type UCN-4805A is intended to serve as the segment driver with standard 7-segment displays incorporating a colon or decimal point. The integrated circuit uses hexadecimal decoding to display 0-9, A,b, C, d, E, and F.This BiMOS latched decoder/driver has sufficient speed to permit operation with most microproces-sorlLSI-based systems. The CMOS input latches provide operation over the supply voltage range of S to IS V with minimum logic loading. Internal output pull-down resistors eliminate the need for external components usually required for fluorescent display applications. When used with standard TTL or low-speed TTL logic, the device may require employment of input pull-up resistors to insure a proper input logic high.
Information present at any register is transferred to the respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high.Applications where the latches are bypassed (STROBE tied low) ordinarily require that the BLANKING input be low between digit selection because of possible non-synchronous decoding.When the BLANKING (BL) input is low, all of the output buffers are disabled (OFF) without affecting the information stored in the latches.With the BLANKING input high, the outputs are controlled by the latchl decoder circuitry.
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