Features: · Provides Control of PFC and PWM Power Stages In One Device· Leading-Edge PFC, Trailing-Edge PWM Modulation for Reduced Ripple· Built-In Sequencing of PFC and PWM Turn-On· 2-A Source and 3-A Sink Gate Drive for Both PFC and PWM Stages· Typical 16-ns Rise Time and 7-ns Fall Time into 1-n...
UCC28514: Features: · Provides Control of PFC and PWM Power Stages In One Device· Leading-Edge PFC, Trailing-Edge PWM Modulation for Reduced Ripple· Built-In Sequencing of PFC and PWM Turn-On· 2-A Source and ...
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over operating free-air temperature (unless otherwise noted)†‡
Supply voltage VCC
Idle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Operating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Gate drive current (GT1, GT2)
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 A
Pulsed
Sourcing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −2.5 A
Sinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 A
Maximum GT1, GT2 voltage . . . . . . . . . . . . . . . . −0.5 V to VCC+0.3 V
Input voltage
VSENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 11 V
D_MAX, SS2, CAOUT, ISENSE1, MOUT, VFF... −0.5 V to VREF+0.3 V
VAOUT, CT_BUFF, ISENSE2, PKLMT . . . . . . . . . . . . . . −0.5 V to 6 V
Pin Current
RT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 mA
VFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −5 mA
CT_BUFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA
VAOUT, VERR, ISENSE2, SS2, CAOUT, IAC . . . . . . . . . . . . . . . .10 mA
Maximum pin capacitance
ISENSE2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 pF
Operating junction temperature range, TJ . . . . . . . . . .−55 to 150
Storage Temperature range, Tstg . . . . . . . . . . . . . . . .−65 to 150
Lead temperature 1.6mm (1/16 inch from case for 10 seconds) . . . .300
Power dissipation
PDIP (N) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
SOIC (DW) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7 W
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute−maximum−rated conditions for extended periods may affect reliability.
‡ Currents are positive into, negative out of the specified terminal. All voltages are referenced to GND.
The UCC28510 series of combination PFC/PWM controllers provide complete control functionality for any off-line power system requiring compliance with the IEC1000−3−2 harmonic reduction requirements. By combining the control and drive signals for the PFC and the PWM stages into a single device, significant performance and cost benefits are gained. By managing the modulation mechanisms of the two stages (leading-edge modulation for PFC and trailing-edge modulation for PWM), the ripple current in the boost capacitor is minimized.
Based on the average current mode control architecture with input voltage feedforward of prior PFC/PWM combination controllers, these devices UCC28510 offer performance advantages. Two new key PWM features are programmable maximum duty cycle and the 2x PWM frequency options to the base PFC frequency. For the PFC stage, the devices feature an improved multiplier and the use of a transconductance amplifier for enhanced transient response.
The core of the PFC section is in a three-input multiplier that generates the reference signal for the line current. The UCC28510 series features a highly linearized multiplier circuit capable of producing a low distortion reference for the line current over the full range of line and load conditions. A low-offset, high-bandwidth current error amplifier ensures that the actual inductor current (sensed through a resistor in the return path) follows the multiplier output command
signal. The output voltage error is processed through a transconductance voltage amplifier.