UC2727

Supply voltage (V_CC - V_EE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40V
Power Inputs (|A - B|) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45V
Analog Input Voltage (ENBL, CLAMP). . . . . . . . . . . . . . . . . -0.3 To Vcc+0.3
Analog Input Voltage (D_SAT+, D_SAT-) . . . . . . . . . . . . . . V_EE-0.3 to V_CC+0.3
Analog Input Current (D_SAT+, D_SAT-) . . . . . . . . . . . . . . . . . . . .-10 to 10mA
Output Current, ½(OUT)½
DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8A
Pulse (0.5s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  4A
FRPLY Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30mA

Note: All voltages are with respect to COM. Currents are positive into the specified terminal.

The UC1727 and its companion chip, the UC1726, provide all the ecessary features to drive an isolated IGBT transistor from a TTL input ignal. A unique modulation scheme is used to transmit both ower and signal across an isolation boundary with a minimum of external omponents.

Protection features include under voltage lockout and desaturation etection. High level gate drive signals are typically 16V. Intermediate igh drive levels can be programmed for various periods of time to imit surge current at turn on and in the event of desaturation due to a short circuit.

The chip generates a bipolar supply so that the gate can be driven to a  negative voltage insuring the IGBT remains off in the presence of high common mode slew rates.

Uses include isolated off-line full bridge and half bridge drives for motors,switches, and any other load requiring full electrical isolation.