UAA3500HL

The UAA3500HL is a one-chip pager receiver complying with POCSAG, FLEXTM and ERMES standards. The IC performs in accordance with specifications in the -10 to +55 °C temperature range.

The UAA3500HL contains a front-end receiver, which can be configured through external components for any frequency band between 130 and 930 MHz. The back-end receiver consists of the channel filter and limiters. An external VCO ensures the Local Oscillator (LO) for the front-end. Designed in an advanced BiCMOS process, it combines high performance with low-power consumption and a high degree of integration, thus reducing external component costs and total radio size.

UAA3500HL's first advantage is to remove the expensive SAW filter necessary in a superhet architecture, replacing it by an integrated, elliptic channel filter that provides 70 dB adjacent channel rejection. The receive front-end section consists of a low-noise amplifier UAA3500HL that drives mixers through an external LC image rejection filter. The output drives the I and Q second mixers, whose outputs are at zero frequency. The receiver back-end section consists of filters (channel filtering), limiters (limited output required) and high-pass filters (DC block) to remove DC offsets.

Outputs are I and Q, undemodulated signals.UAA3500HL's second advantage is to provide the two LO signals from one VCO only, tuned by a PLL. An on-chip frequency divider-by-2 and buffers provide the LO sources.

UAA3500HL's third advantage is to provide two voltage regulators,allowing to obtain 1.0 and 1.8 V regulated voltages.