U6209B-FFP

The U6209B-FFP has the following features including 1.3 GHz divide-by-8 prescaler integrated(can be bypassed);15 bit counter accepts input frequencies up to 170 MHz;Programable reference divider: divide by 512 or 1024;P-controlled by I2C-Bus (MC44818 data format compatible);5 port outputs (open collector);4  addresses selectable at Pin  10 for multituner application;31.25 kHz(-1.3 GHz)/ 3.90625 kHz(-170 MHz)tuning steps with 4MHz Xtal;Electrostatic protection according to MILSTD 883;S016 small package.

The U6209B is a single chip PLL designed for TV and VCR receiver systems. U6209B-FFP consists of an bridgeable divide-by-8 prescaler with an integrated preamplifier, a 15 bit programmable divider, a crystal oscillator and a reference divider with two selectable divider ratios(512 /1024),a phase/frequency detector together with a charge-pump, which is driving the tuning amplifier. Only one external transistor is required for varactor line driving.The U6209B-FFP can be controlled via I'C-bus format.There are four programmable addresses selectable, programmed by applying a specific input voltage to the address select input, enabling the use of up to four synthesizers in a system. Five open collector outputs for port functions are included, which are capable of sinking at least lOmA.A typical application is shown on page 11. All input / out-put interface circuits are shown on page 10.Some special features which are related to test- and alignment procedures for tuner production are explained together within the following I2C bus mode description.The U6209B is controlled via 2-wire I2C-bus format by feeding data and clock signals into the SDA and SCL lines respectively. The table 'nC-BUS DATA FORMAT' describes the format of the data and shows how to select the device address by applying a voltage at pin 10. When the correct address byte is received, the SDA line is pulled low by the device during the acknowledge period, and then also during the acknowledge periods, when additional data bytes are programmed. After the address transmission ( first byte),data bytes can be sent to the device. There are four data bytes requested to fully program the device. The table 'I2C-BUS PULSE DIAGRAM'shows soave possible data transfer examples.

Programmable divider bytes PDB1 and PDB2 of U6209B-FFP are stored in a 15 bit latch and are controlling the division ratio of the 15 bit programmable divider. The control Byte CB 1 allows to control the following special functions:SI-bit switches between low and high charge pump current.