T P D 1 0 3 0 F

• Built-in two power IC chips with a new structure combining a control block and a vertical power  MOSFET (L²--MOS) on each chip.
• Can directly drive a power load from a CMOS or TTL logic.
• Built-in protection circuits against overvoltage (active clamp), overtemperature (thermal shutdown), and overcurrent (current limiter).
• Low Drain-Source ON-resistance: RDS (ON) = 0.6 Ω (max) (@VIN = 5 V, ID = 0.5 A, Tch = 25°C)
• Low Leakage Current: IDSS = 10 µA (max) (@V_IN = 0 V, V_DS = 30 V, Tch = 25°C)
• Low Input Current: IIN = 300 µA (max) (@V_IN = 5 V, Tch = 25°C)
• 8-pin SOP package with embossed-tape packing.