TVP9900PFP

Product :
Logic Family :
Number of Bits :
Number of Lines (Input / Output) :
Propagation Delay Time :
Supply Voltage - Max :
Supply Voltage - Min :
Mounting Style : SMD/SMT
Maximum Operating Temperature : + 70 C
Packaging : Tray
Package / Case : HTQFP


Features:

· ATSC 8-VSB Demodulation and FEC
· ITU-J.83B Compliant 64/256 QAM Demodulation and FEC
· Direct 44-MHz IF Sampling Eliminates Need for External Downconverter
· Integrated IF PGA
· Integrated High-Speed 10-bit A/D Converter
· Integrated Digital Filter Relaxes External Tuner Filters
· Sigma-Delta DAC for AGC Control
· Adjacent Channel Filter 
· NTSC Co-Channel Rejection Filter
· All Digital Timing Recovery
· Pilot Tracking Loop With Lock Status Indicator Signal
· Decision-Directed Carrier Phase Tracking Loop
· Field and Segment Synchronization With Sync Status Indicator Signal
· Host Interrupt for Remote Monitoring of Signal Quality
· SNR Monitor
· BER Monitor
· Integrated De-Interleaver RAM
· Parallel/Serial MPEG Output Interface With Error Packet Indicator
· Direct Tuner Control Interface
· EIA/CEA-909 Antenna Control Interface
· Option for 4-MHz Clock Input Driven by MOP IC in Tuner, So No Quartz Crystal Required for Demodulator
· External DAC and VCXO for Clock Recovery Not Required
· Equalizer Covers Echo Profile Required by ATSC A.74 Guideline
· Superior Multipath Performance Demodulating for Brazil Ensembles A Through E
· Power-Down Mode
· 80-Pin TQFP Package

Pinout




Specifications

DVDD_1_5 Supply voltage range	1.5 V digital core supply	0.5 V to 2.1 V
IOVDD_3_3 Supply voltage range	3.3 V IO cell supply	0.5 V to 4.2 V
AVDD_1_5 Supply voltage range	1.5 V digital core supply	0.5 V to 2.1 V
AVDD_3_3 Supply voltage range	3.3 V analog core supply	0.5 V to 4.2 V
AVDD_REF_3_3 Supply voltage range	3.3 V reference supply	0.5 V to 4.2 V
AVDD_PLL_1_5 Supply voltage range	1.5 V PLL supply	0.5 V to 2.1 V
VI Input voltage range	XTALIN, oscillator input	0.5 V to AVDD_PLL_1_5 + 0.5 V
	Fail-safe LVCMOS	0.5 V to IOVDD_3_3 + 0.5 V
	Differential IF inputs: AIFIN_P, AIFIN_N	0.5 V to AVDD_3_3 + 0.5 V
VO Output voltage range	XTALOUT, oscillator output	0.5 V to AVDD_PLL_1_5 + 0.5 V
	Fail-safe LVCMOS	0.5 V to IOVDD_3_3 + 0.5 V
IIK Input clamp current	VI < 0 or VI > VCC	±20 mA
IOK Output clamp current	VO < 0 or VO > VCC	±20 mA
TA Operating free-air temperature range		0 to 70
Tstg Storage temperature range		65 to 150

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Description

The TVP9900 is a cost-effective digital TV (DTV) front-end IC targeted for low-cost high-volume DTV receivers. The TVP9900 is a system-on-chip (SoC) device that integrates the main functions of a DTV front-end system, including programmable gain amplifier (PGA), A/D converter, VSB demodulator, ATSC forward error correction (FEC), QAM demodulator, and ITU-T Annex B FEC. It provides rich peripheral support including AGC control, tuner control, CEA-909 antenna control, and

Parameters:

Technical/Catalog Information	TVP9900PFP
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	TVP9900PFP TVP9900PFP