TVP7000

Features: ` Analog Channels -6 dB to 6 dB Analog Gain Analog Input MUXs Auto Video Clamp Three Digitizing Channels, Each WithIndependently Controllable Clamp, PGA,and ADC Clamping: Selectable Clamping Between Bottom Level and Mid-level Offset: 1024-Step Programmable RGB or YPbPr Offset Control PGA...

product image

TVP7000 Picture
SeekIC No. : 004533939 Detail

TVP7000: Features: ` Analog Channels -6 dB to 6 dB Analog Gain Analog Input MUXs Auto Video Clamp Three Digitizing Channels, Each WithIndependently Controllable Clamp, PGA,and ADC Clamping: Selectable Clampi...

floor Price/Ceiling Price

Part Number:
TVP7000
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/21

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

` Analog Channels
  -6 dB to 6 dB Analog Gain
  Analog Input MUXs
  Auto Video Clamp
  Three Digitizing Channels, Each With  Independently Controllable Clamp, PGA,and ADC
  Clamping: Selectable Clamping Between Bottom Level and Mid-level
  Offset: 1024-Step Programmable RGB or YPbPr Offset Control
  PGA: 8-Bit Programmable Gain Amplifier
  ADC: 8/10-Bit 150/110 MSPS A/D Converter
  Automatic Level Control Circuit
  Composite Sync: Integrated Sync-on-Green Extraction From GreenLuminance Channel
  Support for DC and AC-Coupled Input Signals
` PLL
  Fully Integrated Analog PLL for Pixel Clock Generation
  12-150 MHz Pixel Clock Generation From HSYNC Input
  Adjustable PLL Loop Bandwidth for Minimum Jitter
  5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
` Output Formatter
  Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
  Dedicated DATACLK Output for Easy Latching of Output Data
` System
  Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
  Space-Saving TQFP-100 Pin Package
  Thermally-Enhanced PowerPAD™ Package for Better Heat Dissipation
 




Application

· LCD TV/Monitors/Projectors
· DLP TV/Projectors
· PDP TV/Monitors
· PCTV Set-Top Boxes
· Digital Image Processing
· Video Capture/Video Editing
· Scan Rate/Image Resolution Converters
· Video Conferencing
· Video/Graphics Digitizing Equipment



Pinout

  Connection Diagram


Specifications

 
UNIT
Supply voltage range IOVDD to IOGND
0.5 V to 4.5 V
DVDD to GND
0.5 V to 2.3 V
PLL_A18VDD to PLL_A18GND and A18VDD to A18GND
0.5 V to 2.3 V
A33VDD to A33GND
0.5 V to 4.5 V
Digital input voltage range VI to GND
0.5 V to 4.5 V
Analog input voltage range AI to A33GND
0.2 V to 2.3 V
Digital output voltage range VO to GND
0.5 V to 4.5 V
TA Operating free-air temperature
0°C to 70°C
Tstg Storage temperature
65°C to 150°C



Description

TVP7000 is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces.The device supports pixel rates up to 150 MHz.Therefore, it can be used for PC graphics digitizing up to the VESA standard of SXGA (1280 ´ 1024) resolution at 75 Hz screen refresh rate, and in video environments for the digitizing of digital TV formats,including HDTV up to 1080p. TVP7000 can be used to digitize CVBS and S-Video signal with 10-bit ADCs.

The TVP7000 is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance A/D converter with clamping functions and variable gain,independently programmable for each channel. The clamping timing window is provided by an external pulse or can be generated internally. It includes analog slicing circuitry on the Y or G input to support sync-on-luminance or sync-on-green extraction. In addition, TVP7000 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

TVP7000 also contains a complete analog PLL block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 150
MHz.

All programming of the part is done via an indus-try-standard I2C interface, which supports both reading and writing of register settings. The TVP7000 is available in a space-saving TQFP 100-pin PowerPAD package.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Integrated Circuits (ICs)
Inductors, Coils, Chokes
Connectors, Interconnects
Cables, Wires - Management
Power Supplies - Board Mount
View more