TS83102G0B

Features:

Up to 2 Gsps Sampling Rate•Power Consumption: 4.6 W                                                                                         

500 mVpp Differential 100 Ω or Single-ended 50 Ω (±2 %) Analog Inputs                            

Differential 100 Ω or Single-ended 50 Ω Clock Inputs

ECL or LVDS Output Compatibility

50 Ω Differential Outputs with Common Mode not Dependent on Temperature

ADC Gain Adjust

Sampling Delay Adjust

Offset Control Capability

Data Ready Output with Asynchronous Reset

Out-of-range Output Bit•Selectable Decimation by 32 Functions

Gray or Binary Selectable Output Data; NRZ Output Mode

Pattern Generator Output (for Acquisition System Monitoring)

Radiation Tolerance Oriented Design (More Than 100 Krad (Si) Expected)

CBGA 152 Cavity Down Hermetic Package

CBGA Package Evaluation Board TSEV83102G0BGL

Companion Device: DMUX 8-/10-bit 1:4/1:8 2 Gsps TS81102G0

Application

Direct RF Down Conversion
Wide Band Satellite Receiver
High-speed Instrumentation
High-speed Acquisition Systems
High-energy Physics
Automatic Test Equipment
Radar


Pinout




Description

The TS83102G0B is a monolithic 10-bit analog-to-digital converter, designed for digi-tizing wide bandwidth analog signals at very high sampling rates of up to 2 Gsps. It uses an innovative architecture, including an on-chip Sample and Hold (S/H). The 3.3 GHz full power input bandwidth and band flatness performances enable the digitiz-ing of high IF and large bandwidth signals.