TS81102G0

Features: • Programmable DMUX Ratio: 1:4: Data Rate Max = 1 Gsps PD (8b/10b) < 4.3/4.7 W (ECL 50Ω output) 1:8: Data Rate Max = 2 Gsps PD (8b/10b) < 6/6.9 W (ECL 50Ω output) 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX• Parallel Output Mode• 8-/10-bit• ECL...

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SeekIC No. : 004528960 Detail

TS81102G0: Features: • Programmable DMUX Ratio: 1:4: Data Rate Max = 1 Gsps PD (8b/10b) < 4.3/4.7 W (ECL 50Ω output) 1:8: Data Rate Max = 2 Gsps PD (8b/10b) < 6/6.9 W (ECL 50Ω output) 1...

floor Price/Ceiling Price

Part Number:
TS81102G0
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

• Programmable DMUX Ratio: 1:4: Data Rate Max = 1 Gsps PD (8b/10b) < 4.3/4.7 W (ECL 50Ω output) 1:8: Data Rate Max = 2 Gsps PD (8b/10b) < 6/6.9 W (ECL 50Ω output) 1:16 with 1 TS8388B or 1 TS83102G0 and 2 DMUX
• Parallel Output Mode
• 8-/10-bit
• ECL Differential Input Data
• DataReady or DataReady/2 Input Clock
• Input Clock Sampling Delay Adjust
• Single-ended Output Data: Adjustable Common Mode and Swing Logic Threshold Reference Output (ECL, PECL, TTL)
• Asynchronous Reset
• Synchronous Reset
• ADC + DMUX Multi-channel Applications: Stand-alone Delay Adjust Cell for ADCs Sampling Instant Alignment
• Differential Data Ready Output
• Built-in Self Test (BIST)
• Dual Power Supply VEE = -5V, VCC = +5V
• Radiation Tolerance Oriented Design (More than 100 Krad (Si) Expected)
• TBGA 240 (Cavity Down) Package




Specifications

Parameter

Symbol

Comments

Value

Unit

Positive supply voltage

VCC

 

GND to 6

v

Positive output buffer supply voltage

VPLUSD

 

GND to 4

v

Negative supply voltage

VEE

 

GND to 6

v

Analog input voltages

ADCDelAdjCtrl,
ADCDelAdjCtrlb or
DMUXDelAdjCtrl,
DMUXDelAdjCtrlb or
SwiAdj

Voltage range for each
pad
Differential voltage
range

-1 to +1
-1 to +1

v

ECL 50Ω input voltage

Clkln or Clklnb or
I[0.9] or I[0.9]b or
SyncReset or
SyncResetb or
ADCDelAdjln or
ADCDelAdjlnb

Voltage range for each
pad

-2.2 to +0.6

v

Maximum difference between ECL 50Ω
input voltages

Clkln Clklnb or
I[0.9] - I[0.9]b or
SyncReset
Syncresetb or
ADCDelAdjln -
ADCDelAdjlnb

Minimum differential
swing
Maximum differential
swing

0.1
2

v




Description

The TS81102G0 is a monolithic 10-bit high-speed (up to 2 GHz) demultiplexor.

The DMUX is designed to run with all kinds of ADCs and more specifically, it fits per-fectly with Atmel high-speed ADC 8-bit 1 Gsps TS8388B, ADC 10-bit 2 GspsTS83102G0 and ADC 8-bit 4 Gsps TS83084G0.

The TS81102G0 uses an innovative architecture, including a sampling delay adjustand tunable output levels.

This DMUX allows users to process the high-speed output data stream down to pro-cessor speed. It uses the very high-speed bipolar technology (25 GHz NPN cut-offfrequency).




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