TS3DS26227

Features:

` High-Bandwidth Data Paths Up to 800 MHz
` Specified Break-Before-Make Switching
` Control Inputs Reference to V<sub>IO</sub>
` Low Charge Injection
` Excellent ON-State Resistance Matching
` Low Total Harmonic Distortion (THD)
` 2.3-V to 3.6-V Power Supply (V<sub>+</sub>)
` 1.65-V to 1.95-V Logic Supply (V_IO)
` Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
` ESD Performance Tested Per JESD 22
4000-V Human-Body Model (A114-B, Class II)
1000-V Charged-Device Model (C101)
200-V Machine Model (A115-A)


Application

· Cell Phones
· PDAs
· Portable Instrumentation
· Low-Voltage Differential Signal Routing

 

Specifications

			MIN	MAX	UNIT
V+ VIO	Supply voltage range(3)		-0.5	4.6	V
VNC VNO VCOM	Analog voltage range(3) (4) (5)		0.5	V+ + 0.5	V
IK	Analog port diode current	VNC, VNO, VCOM < 0, or VNC, VNO, VCOM > V+ + 0.5	50	50	mA
INC INO ICOM	On-state switch current	VNC, VNO, VCOM = 0 to V+	-64	64	mA
	On-state peak switch current(6)		-100	100
VI	Digital input voltage range		-0.5	VIO + 0.5	V
IIK	Digital input clamp current(3) (4)	VI < 0, or VI > VIO + 0.5	-50	50	mA
I+ IGND	Continuous current through V+ or GND		100	100	mA
JA	Package thermal impedance(7) (8)			TBD	/W
Tstg	Storage temperature range		-65	150

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) Requires clamp diodes on analog port to V+
(7) Pulse at 1-ms duration <10% duty cycle
(8) The package thermal impedance is calculated in accordance with JESD 51-7.

Description

The TS3DS26227 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.3 V to 3.6 V. The device offers high-bandwidth data paths, and a break-before-make feature to prevent signal distortion during the transferring of a signal from one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable applications.

The TS3DS26227 has a separate logic supply pin (V_IO) that operates from 1.65 V to 1.95 V. V_IO powers the control circuitry, which allows the TS3DS26227 to be controlled by 1.8-V signals.