Features: ` Specified Break-Before-Make Switching` Low ON-State Resistance (<0.5 )` Control Inputs Are 1.8-V Logic Compatible` Low Charge Injection` Excellent ON-State Resistance Matching` Low Total Harmonic Distortion (THD)` 1.65-V to 4.3-V Single-Supply Operation` Latch-Up Performance Exceeds...
TS3A44159: Features: ` Specified Break-Before-Make Switching` Low ON-State Resistance (<0.5 )` Control Inputs Are 1.8-V Logic Compatible` Low Charge Injection` Excellent ON-State Resistance Matching` Low To...
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MIN MAX |
UNIT | |||
V+ Supply voltage range(3) |
0.5 4.6 |
V | ||
VNC VNO Analog voltage range(3) (4) (5) VCOM |
0.5 V+ + 0.5 |
V | ||
IK Analog port diode current |
VNC, VNO, VCOM < 0 |
50 |
mA | |
INC INO ICOM |
ON-state switch current |
VNC, VNO, VCOM = 0 to V+ |
200 200 |
mA |
ON-state peak switch current(6) |
400 400 | |||
VI Digital input voltage range |
0.5 4.6 |
V | ||
IIK Digital input clamp current(3) (4) |
VI < 0 |
50 |
mA | |
I+ Continuous current through V+ |
100 |
mA | ||
IGND Continuous current through GND |
100 |
mA | ||
qJA Package thermal impedance(7) |
PW package |
108 |
/W | |
RGT package |
TBD | |||
RSV package |
TBD | |||
Tstg Storage temperature range |
65 150 |
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 4.6 V maximum.
(6) Pulse at 1-ms duration <10% duty cycle
(7) The package thermal impedance is calculated in accordance with JESD 51-7.
The TS3A44159 is a quad single-pole double-throw (SPDT) analog switch with two control inputs, which is designed to operate from 1.65 V to 4.3 V. This device is also known as a dual double-pole double-throw (DPDT) configuration. It offers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to another. The device TS3A44159 has an excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications