TPUMCR2

The TPUMCR2 is an intelligent, semi-autonomous co-processor designed for timing control. Operating simultaneously with the CPU, the TPUMCR2 processes microinstructions, schedules and processes real-time hardware events, performs input and output, and accesses shared data without CPU intervention. Consequently, for each timer event, the PU setup and service time are minimized or eliminated. igure 1-1 s a simplified lock diagram of the TPU.